IP level ASIC verifier

Requirements and responsibilities:

Proficient with verification using UVM methodology

Strong collaborative skills with System Architects and Integration teams

Proficient in verification planning, reporting and driving verification closure. Must understand how a verification project works, from start to finish.

Experience with IP level and system level verification.

Strong team player

Excellent communication skills, both written and oral English

Experience with UNIX and/or Linux

At least 7 years in the ASIC/FPGA industry

Strong work ethics



Good to have:

Experience with UART, SPI, and I3C protocols

Experience with analog-mixed-signal type ASICs

Experience using formal properties and tools, such as Jasper, OneSpin, InFact and similar

Experience in using golden models/reference models in a test bench

Experience in agile ways of working, agile scrum

Clearcase version control system experience

VHDL knowledge

C-programming

Scripting in Perl, Python, Bash or C-shell

More than 10 years in the ASIC/FPGA industry



Start: ASAP, or when Your current obligations allow.

Extent & Duration: Long term. Full time as an employee.



Please send Your CV to jobs_bulgaria2021..a..telescopeservices.se. Please state application code TEL2021-IPA in the subject of Your email.

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